Efficient transmission of highspeed electrical signals is essential to meet the demanding requirements of telecommunications network systems operating at or above 10 Gigabits-per-second (Gbps). Printed circuit boards and individual circuit elements on those boards, such as transmission lines and connectors, must be carefully designed to minimize signal loss. The importance of the transitions between these transmission lines and connectors is increasing as telecommunications systems operate at higher speeds. As frequencies rise to 10 GHz and higher these transitions become critical to RF performance.
Most circuit boards used in high-speed telecommunications applications (as well as many other applications) are multi-layered printed circuit boards. A portion of one such board is shown in FIG. 1. In the board of FIG. 1, as is typical with such circuit boards, circuit paths 101 and 111 (also referred to as traces) carry electrical signals across the circuit board. The illustrative circuit board has layers 102, 105, 106 and 107 which are fabricated using well-known fabrication techniques so that at least some of the aforementioned layers can carry data between two or more different components connected to the board. Dielectric layers are placed between the layers 102, 105, 106 and 107 to electrically isolate the traces on those individual layers and, for example, to define the transmission line impedance. Typically, once the board layers are assembled into a multi-layered circuit board, vias such as via 103 having connection pads 104, 108, 109 and 110 are drilled into the multi-layer circuit board and coated with a conducting material, such as copper, in order to provide a way to connect a trace on one layer of the circuit board to a trace on another layer of the circuit board. Additionally, after assembly of the board, chips and sockets and other components are soldered onto the board. In operations, for example, a signal travels along entering trace 101 in direction 112 until it reaches via 103. The aforementioned conducting material of via 103 conducts the signal down the length of the via 103 to exit trace 111. Exit trace 111 then conducts the signal in direction 113 to a desired destination, such as a circuit board component connected trace 111.
FIG. 2 shows how, instead of using vias to connect two traces at different layers of a circuit board, vias can be used to connect external packages to a trace at a particular layer of the circuit board. In particular, external electronics packages typically have one or more connectors, such as press-fit connector 201, that are sized to fit within via 103. In operations, for example, a signal is transmitted by the electronics package connector through the via at which point it is routed via exit trace 111 to its destination. In such implementations, via 101 of FIG. 1 would not be used.
The illustrative vias shown in FIGS. 1 and 2 are widely used in circuit board design and are effective for connecting internal or external signal, ground and voltage lines to different layers of the board, especially at lower transmission frequencies. However, as the signal transmission speeds (e.g., above 5 Gbps) and frequencies increase, the vias described above become less effective. Specifically, as is well-known in the art, as the frequency increases the use of vias causes resonance. Thus, the amplitude of the signal exiting the via is greatly reduced as the frequency increases.
FIG. 3 shows how resonance is created due to the use of vias in circuit boards. Once again, as described above, a data-carrying signal travels in direction 312 along trace 301 in circuit board layer 302. When the signal reaches via 303, it is transmitted in direction 305 to trace 306 in layer 304. The signal is then routed along trace 306 to a desired destination. However, resonance is created by via 303 because, in addition to traveling in path 305 to trace 306, the signal partially also travels along paths 309, 310, 311 and 312 along the conductive coating of via 303. Depending upon the frequency and wavelength of the signal and the electrical length of paths 309, 310, 311 and 312, the via will resonate and cause destructive interference with signal 305.
FIG. 4A shows a graph 401 of a typical signal loss experienced by vias, such as that illustrated in FIG. 3, to connect transmission lines on a circuit board. Specifically, graph 401 shows line 402, which represents the signal strength of a given trace (such as that illustrated in FIG. 4B), and line 403, which shows the results of the use of vias connected to the trace (such as is illustrated in FIG. 4C).
FIG. 4B shows a transmission line that consists of trace 416 on circuit board 415. Plot 402 represents a simulation of the signal output at point B for an input at point A of a signal of a given frequency. Referring once again to plot 402 in FIG. 4A, signal loss occurs as a signal is transmitted along the trace mostly because of well-known conductor loss and material loss in the transmission line and the surrounding dielectric layers. Line 402 on graph 401 shows that, at very low frequencies, there is virtually no signal loss. This line also shows that the signal amplitude drops as the frequency rises until, at 10 GHz, the signal loss equals approximately 3.5 dB.
Plot 403 in FIG. 4A shows the results of using vias together with a transmission line carrying the same original signal as that used as an input to create plot 402. More particularly, plot 403 represents the loss experienced over a trace connected to two vias, such as illustrated in FIG. 4C. In the configuration of FIG. 4C, a signal enters the circuit board at point A′ and is conducted within circuit board 404 along trace 405 in direction 406. Via 407 conducts the signal in direction 408 to trace 410 that is, for example, 200 mm in length and is at a different layer of circuit board 404 than trace 405. The signal travels in direction 409 along trace 410. Via 411 conducts the signal in direction 412 to trace 414, which conducts the signal in direction 413 to point B′. Plot 403 in FIG. 4A is a representation of simulated measurements taken at point B′ in FIG. 4B.
For this configuration, plot 403 shows that, beginning below a frequency of 1 GHz, resonance causes the transmitted signal to degrade in a nonlinear fashion. At 3 GHz, the resonance causes a modest signal loss of approximately 3 dB. However, the resonance increases nonlinearly as a function of frequency until, at approximately 8 GHz, the resulting signal loss is in excess of 16 dB. Thus, especially when connected with other circuit design elements, typical prior art vias are unsuitable for high-frequency applications.
FIGS. 5 and 6 show prior attempts to reduce the effects of resonance shown in FIG. 3. FIG. 5 shows a method, known as blind-via, which is useful for at least partially reducing the resonance described above. In FIG. 5, trace 502 is, illustratively, a data-carrying trace on which a data signal is carried in direction 508 to via 503. Alternatively, as discussed previously, connector 506 may be inserted into via 503 in direction 507 to introduce a signal from an external electronics package into via 503. If via 503 is used to connect to such an external package, trace 502 typically would not be present. Trace 505 then routes the inserted signal to an intended destination in direction 509. Comparing FIG. 5 to FIG. 3, however, it can be seen that, unlike via 303, via 503 does not extend the entire depth of the circuit board 501. This is because, using a blind-via technique allows drilling of vias of only a specified depth. Thus, a path similar to path 309 in FIG. 3 does not exist in FIG. 5 and, accordingly, the resonance is greatly reduced. However, resonance is not eliminated because, while a large portion of the via 503 is eliminated compared to via 303 in FIG. 3, a small portion remains, such as portion 511. Additionally, a blind via does not eliminate portion 510 of via 503 above trace 502. Thus, portions 510 and 511 of via 503 lead to some level of signal-interfering resonance, albeit greatly reduced compared to the resonance experienced within via 303 of FIG. 3. The most significant disadvantage to drilling blind vias is cost. Replacing the vias on a circuit board with blind vias at least doubles the cost of manufacturing such a board compared to a board using the traditional vias of FIG. 3.
FIG. 6 shows another prior attempt to eliminate the resonance of FIG. 3. Specifically, FIG. 6 shows a technique of removing an unnecessary, resonance-inducing portion of a via by counterboring the via. Compared to the blind-via embodiment of FIG. 5, via 601 in FIG. 6 is drilled entirely through the circuit board 501 and conducting material 504 is disposed on the inner surface of the via 601. Area 608 is removed by counterboring in a way such that the conducting material 504 is removed, thus removing a signal path that causes resonance, such as signal path 309 in FIG. 3. However in the embodiment in FIG. 6, as with the embodiment of FIG. 5, small portions of the via such as portions 609 and 610, typically remain and, as a result, the quality of the signal path is deteriorated. Additionally, the circuit boards using counterboring are at least 25%–30% more expensive to manufacture.